Specialized processing devices can comprise processing circuitry that is pre-configured to perform a discrete set of computing operations more quickly than generalized central processing units. Application-Specific Integrated Circuits (ASICs) comprise integrated circuitry that is specifically designed to perform a specific set of operations or calculations, and, as such, can perform such operations or calculations more quickly, or more efficiently, than generalized central processing units. Field-Programmable Gate Arrays (FPGAs) likewise comprise integrated circuitry, typically in the form of programmable logic blocks comprised of individual microprocessor gates and other like integrated circuits, which can be programmed or designed to perform a specific set of operations or calculations more quickly, and more efficiently, then generalized central processing units.
One area in which customized integrated circuits, such as ASICs and FPGAs, are utilized to perform calculations is in the analysis of nucleotide sequences. As will be recognized by those skilled in the art, two strings of nucleotide sequences can be compared such that the manner in which they align can reveal important differences. One mechanism for performing such a local sequence alignment is the Smith Waterman algorithm. Prior efforts to perform Smith Waterman analysis utilizing customized integrated circuits have been limited by the amount of memory required. Indeed, the traditional mechanism for comparing nucleotide sequences can require maintaining, in memory, a two-dimensional matrix that can consume several hundred kilobytes. While such a memory requirement is not, by itself, necessarily burdensome, it limits the number of pairs of nucleotide sequences that can be performed in parallel since each two-dimensional matrix, formed for the comparison of each pair of nucleotide sequences, consumes several hundred kilobytes. Existing solutions include storing such two-dimensional matrices in memory that is external to the customized integrated circuit performing the comparison of two strings of nucleotide sequences. However, as will be recognized by those skilled in the art, access to such memory can be substantially slower than access to memory located on a same chip, such as a same ASIC or FPGA whose circuitry is performing the comparison between the pair of nucleotide sequences.